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MK2304-2 - LOW SKEW BUFFER

General Description

The MK2304-2 is a low jitter, low skew, high performance Phase Lock Loop (PLL) based zero delay buffer for high speed applications.

Based on IDT’s proprietary low jitter PLL techniques, the device provides four low skew outputs at speeds up to 133 MHz at 3.3 V.

Key Features

  • Packaged in 8 pin SOIC.
  • Zero input-output delay.
  • Two 1X outputs plus two 1/2X outputs.
  • Output to output skew is less than 200 ps.
  • Output clocks up from 10 MHz to 133 MHz at 3.3 V.
  • Ability to generate 2X the input.
  • Full CMOS outputs with 8 mA output drive capability at TTL levels at 3.3 V.
  • Spread SmartTM technology works with spread spectrum clock generators.
  • Advanced, low power, sub micron CMOS process.
  • Op.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ZERO DELAY, LOW SKEW BUFFER DATASHEET MK2304-2 Description The MK2304-2 is a low jitter, low skew, high performance Phase Lock Loop (PLL) based zero delay buffer for high speed applications. Based on IDT’s proprietary low jitter PLL techniques, the device provides four low skew outputs at speeds up to 133 MHz at 3.3 V. The MK2304-2 includes a bank of two outputs running at 1/2X. In the zero delay mode, the rising edge of the input clock is aligned with the rising edges of all 4 outputs. Compared to competitive CMOS devices, the MK2304-2 has the lowest jitter. The MK2304-2 PLL enters a power-down state when there are no rising edges on the REF input. In this mode, all outputs are tri-stated and the PLL is turned off, resulting in leass than 25 µA of current draw.