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MK74CG117A - 16 OUTPUT LOW SKEW CLOCK GENERATOR

General Description

The MK74CG117A is a monolithic CMOS high-speed, low-skew clock driver that includes an on-chip PLL.

Key Features

  • 48-pin SSOP (300 mil) package.
  • On-chip PLL generates output clocks up to 90 MHz from a simple crystal or clock input.
  • 16 low-skew outputs.
  • Output skew less than 350 ps on rising edges.
  • Ability to configure as.
  • 16 clocks at full-frequency.
  • 12 at full and 4 at half-frequency.
  • 8 at full and 8 at half-frequency.
  • Tri-state mode for Output Enable function.
  • 3.3 V ±5% supply voltage Block Diagram S2:0 3 2 M1:0.

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Datasheet Details

Part number MK74CG117A
Manufacturer Renesas
File Size 311.38 KB
Description 16 OUTPUT LOW SKEW CLOCK GENERATOR
Datasheet download datasheet MK74CG117A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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16 OUTPUT LOW SKEW CLOCK GENERATOR DATASHEET MK74CG117A Description The MK74CG117A is a monolithic CMOS high-speed, low-skew clock driver that includes an on-chip PLL. Ideal for communications and other systems that require a large number of high-speed clocks, the unique combination of PLL and 16 low-skew outputs can eliminate oscillators and low-skew buffers from systems. The device has a number of built-in multipliers, making it possible to run from one inexpensive, low-frequency crystal, and produce high-frequency clock outputs. Another selection allows the chip to run as a divider, dividing the input clock by two (or 4 using the mode select). The device also has a buffered reference output, allowing multiple devices to be easily driven from one clock source.