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MPC9447 Datasheet

LVCMOS Clock Fanout Buffer

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3.3V, 2.5V, 1:9 LVCMOS Clock Fanout
Buffer
PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES SEPTEMBER 7, 2016
MPC9447
DATA SHEET
The Freescale Semiconductor, Inc. MPC9447 is a 3.3 V or 2.5 V compatible, 1:9 clock
fanout buffer targeted for high performance clock tree applications. With output frequencies up
to 350 MHz and output skews less than 150 ps, the device meets the needs of most demanding
clock applications.
Features
• 9 LVCMOS Compatible Clock Outputs
• 2 Selectable, LVCMOS Compatible Inputs
• Maximum Clock Frequency of 350 MHz
• Maximum Clock Skew of 150 ps
• Synchronous Output Stop in Logic Low State Eliminates Output Runt Pulses
• High-Impedance Output Control
• 3.3 V or 2.5 V Power Supply
• Drives up to 18 Series Terminated Clock Lines
• Ambient Temperature Range -40C to +85C
• 32-Lead LQFP Packaging, Pb-free
• Supports Clock Distribution in Networking, Telecommunications, and Computer
Applications
• Pin and Function Compatible to MPC947
For drop in replacement use 83947AYILN
LOW VOLTAGE
3.3 V/2.5 V LVCMOS 1:9
CLOCK FANOUT BUFFER
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-03
Functional Description
MPC9447 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350 MHz. Each output provides a
precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50 terminated transmission lines on the incident
edge. Each is capable of driving either one parallel terminated or two series terminated transmission lines.
Two selectable independent LVCMOS compatible clock inputs are available, providing support of redundant clock source systems. The
MPC9447 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only
in a logic low state, and thus, eliminates potential output runt pulses. Applying the OE control will force the outputs into high-impedance mode.
All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports a 2.5 V or 3.3
V power supply and an ambient temperature range of -40C to +85C. The MPC9447 is pin and function compatible but performance-enhanced
to the MPC947.
MPC9447 REVISION 9 3/15/16
1
©2016 Integrated Device Technology, Inc.


Renesas Electronics Components Datasheet

MPC9447 Datasheet

LVCMOS Clock Fanout Buffer

No Preview Available !

MPC9447 DATA SHEET
VCC
Q0
CCLK0
CCLK1
0
CLK
1
Stop
Q1
VCC
Q2
25k
Q3
CLK_SEL
VCC
Q4
25k
Q5
CLK_STOP
SYNC
Q6
Q7
VCC
Q8
(All input resistors have a value of 25 k)
OE
24 23 22 21 20 19 18 17
GND
25
16
GND
Q2
26
15
Q6
VCC
27
Q1
28
GND
29
MPC9447
14
VCC
13
Q7
12
GND
Q0
30
11
Q8
VCC
31
10
VCC
GND
32
9
GND
12345678
Figure 1. Logic Diagram
Figure 2. 32-Lead Pinout (Top View)
Table 1. Function Table
Control
CLK_SEL
OE
CLK_STOP
Default
1
1
1
0
CLK0 input selected
Outputs disabled (high-impedance state)(1)
Outputs synchronously stopped in logic low state
1. OE = 0 will high-impedance tristate all outputs independent on CLK_STOP.
1
CLK1 input selected
Outputs enabled
Outputs active
Table 2. Pin Configurations
Pin
I/O
CCLK0
Input
CCLK1
Input
CLK_SEL
Input
CLK_STOP
Input
OE
Input
Q0–8
Output
GND
Supply
VCC
Supply
Type
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Ground
VCC
Function
Clock Signal Input
Alternative Clock Signal Input
Clock Input Select
Clock Output Enable/Disable
Output Enable/Disable (high-impedance tristate)
Clock Outputs
Negative Power Supply (GND)
Positive power supply for I/O and core. All VCC pins must be connected to the
positive power supply for correct operation
REVISION 9 3/15/16
2
©2016 Integrated Device Technology, Inc.


Part Number MPC9447
Description LVCMOS Clock Fanout Buffer
Maker Renesas
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MPC9447 Datasheet PDF






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