MPC9447 Overview
MPC9447 is specifically designed to distribute LVCMOS patible clock signals up to a frequency of 350 MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50 terminated transmission lines on the incident edge.
MPC9447 Key Features
- 9 LVCMOS patible Clock Outputs
- 2 Selectable, LVCMOS patible Inputs
- Maximum Clock Frequency of 350 MHz
- Maximum Clock Skew of 150 ps
- Synchronous Output Stop in Logic Low State Eliminates Output Runt Pulses
- High-Impedance Output Control
- 3.3 V or 2.5 V Power Supply
- Drives up to 18 Series Terminated Clock Lines
- Ambient Temperature Range -40C to +85C
- 32-Lead LQFP Packaging, Pb-free
