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Renesas Electronics Components Datasheet

NP55N055SUG Datasheet

MOS FIELD EFFECT TRANSISTOR

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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP55N055SUG
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The NP55N055SUG is N-channel MOS Field Effect
Transistor designed for high current switching applications.
ORDERING INFORMATION
PART NUMBER
PACKAGE
NP55N055SUG
TO-252 (MP-3ZK)
FEATURES
Channel temperature 175 degree rating
Super low on-state resistance
RDS(on) = 10 mMAX. (VGS = 10 V, ID = 28 A)
Low Ciss: Ciss = 3500 pF TYP.
(TO-252)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
55
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±55
±220
Total Power Dissipation (TC = 25°C)
PT1 77
Total Power Dissipation (TA = 25°C)
Channel Temperature
PT2 1.2
Tch 175
Storage Temperature
Repetitive Avalanche Current Note2
Repetitive Avalanche Energy Note2
Tstg 55 to +175
IAR 27
EAR 73
Notes 1. PW 10 µs, Duty Cycle 1%
2. Tch < 150°C, VDD = 28 V, RG = 25 , VGS = 20 0 V
V
V
A
A
W
W
°C
°C
A
mJ
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
Rth(ch-C)
Rth(ch-A)
1.95
125
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D16863EJ2V0DS00 (2nd edition)
Date Published January 2005 NS CP(K)
Printed in Japan
The mark shows major revised points.
2004


Renesas Electronics Components Datasheet

NP55N055SUG Datasheet

MOS FIELD EFFECT TRANSISTOR

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NP55N055SUG
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS VDS = 55 V, VGS = 0 V
Gate Leakage Current
IGSS VGS = ±20 V, VDS = 0 V
Gate Cut-off Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(off)
| yfs |
RDS(on)
VDS = VGS, ID = 250 µA
VDS = 10 V, ID = 28 A
VGS = 10 V, ID = 28 A
Input Capacitance
Ciss VDS = 25 V
Output Capacitance
Coss
VGS = 0 V
Reverse Transfer Capacitance
Crss f = 1 MHz
Turn-on Delay Time
td(on)
VDD = 28 V, ID = 28 A
Rise Time
tr VGS = 10 V
Turn-off Delay Time
td(off)
RG = 0
Fall Time
tf
Total Gate Charge
QG VDD = 44 V
Gate to Source Charge
QGS
VGS = 10 V
Gate to Drain Charge
Body Diode Forward Voltage Note
QGD
VF(S-D)
ID = 55 A
IF = 55 A, VGS = 0 V
Reverse Recovery Time
trr IF = 55 A, VGS = 0 V
Reverse Recovery Charge
Note Pulsed
Qrr di/dt = 100 A/µs
MIN.
2.0
11
TYP.
3.0
22
7.7
3500
260
160
24
18
60
8
60
15
21
0.95
38
45
MAX.
1.0
±100
4.0
10
5250
390
290
53
45
120
20
90
1.5
UNIT
µA
nA
V
S
m
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25
PG.
VGS = 20 0 V
50
L
VDD
BVDSS
ID
VDD
IAS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 µs
Duty Cycle 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
Wave Form
0
td(on)
VGS 90%
90%
10% 10%
tr td(off) tf
ton toff
D.U.T.
IG = 2 mA
PG. 50
RL
VDD
2 Data Sheet D16863EJ2V0DS


Part Number NP55N055SUG
Description MOS FIELD EFFECT TRANSISTOR
Maker Renesas
Total Page 6 Pages
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