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Renesas Electronics Components Datasheet

NP75P04YLG Datasheet

N-Channel MOSFET

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NP75P04YLG
MOS FIELD EFFECT TRANSISTOR
Preliminary Data Sheet
R07DS0183EJ0200
Rev.2.00
Mar 16, 2011
Description
The NP75P04YLG is P-channel MOS Field Effect Transistor designed for high current switching applications.
Features
Low on-state resistance
RDS(on) = 9.7 mΩ MAX. (VGS = 10 V, ID = 37.5 A)
RDS(on) = 14 mΩ MAX. (VGS = 5 V, ID = 37.5 A)
Logic level drive type
Gate to Source ESD protection diode built in
Designed for automotive application and AEC-Q101 qualified
Ordering Information
Part No.
NP75P04YLG -E1-AY 1
NP75P04YLG -E2-AY 1
LEAD PLATING
Pure Sn (Tin)
PACKING
Tape 2500 p/reel
Note: 1. Pb-free (This product does not contain Pb in the external electrode.)
Package
8-pin HSON, Taping (E1 type)
8-pin HSON, Taping (E2 type)
<R>
<R>
Absolute Maximum Ratings (TA = 25°C)
Item
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) 1
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C) 2
Channel Temperature
Storage Temperature
Single Avalanche Current 3
Single Avalanche Energy 3
Symbol
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
PT2
Tch
Tstg
IAS
EAS
Ratings
40
m20
m75
m225
138
1.0
175
55 to +175
35
123
Unit
V
V
A
A
W
W
°C
°C
A
mJ
Thermal Resistance
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance 2
Rth(ch-C)
Rth(ch-A)
1.09
150
°C/W
°C/W
Notes: 1. TC = 25°C, PW 10 μs, Duty Cycle 1%
2. Mounted on glass epoxy substrate of 40 mm x 40 mm x 0.8 mmt
*3. Starting Tch = 25°C, VDD = 20 V, RG = 25 Ω, L = 100 μH, VGS = 20 0 V
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
R07DS0183EJ0200 Rev.2.00
Mar 16, 2011
Page 1 of 6


Renesas Electronics Components Datasheet

NP75P04YLG Datasheet

N-Channel MOSFET

No Preview Available !

NP75P04YLG
Electrical Characteristics (TA = 25°C)
Item
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Threshold Voltage
Forward Transfer Admittance 1
Drain to Source On-state
Resistance 1
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage 1
Reverse Recovery Time
Reverse Recovery Charge
Note: 1. Pulsed
Symbol
IDSS
IGSS
VGS(th)
| yfs |
RDS(on)1
RDS(on)2
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
trr
Qrr
Min
1.0
31
Typ
1.7
63
7.7
9.3
3200
460
250
12
11
320
180
91
14
26
1.02
43
57
Max
1
m10
2.5
9.7
14
4800
600
450
24
27
640
440
140
1.5
Chapter Title
Unit
μA
μA
V
S
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
Test Conditions
VDS = 40 V, VGS = 0 V
VGS = m20 V, VDS = 0 V
VDS = VGS, ID = 250 μ A
VDS = 5 V, ID = 37.5 A
VGS = 10 V, ID = 37.5 A
VGS = 5 V, ID = 37.5 A
VDS = 25 V,
VGS = 0 V,
f = 1 MHz
VDD = 20 V, ID = 37.5 A,
VGS = 10 V,
RG = 0 Ω
VDD = 32 V,
VGS = 10 V,
ID = 75 A
IF = 75 A, VGS = 0 V
IF = 75 A, VGS = 0 V,
di/dt = 100 A/μ s
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
PG.
VGS = 20 0 V
50 Ω
L
VDD
ID
VDD
IAS
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG. RG
VGS()
0
τ
τ = 1 μs
Duty Cycle 1%
RL
VDD
VGS()
VGS
Wave Form
10%
0
VDS()
90%
VDS
VDS
Wave Form
0
td(on)
VGS 90%
90%
10% 10%
tr td(off)
tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
R07DS0183EJ0200 Rev.2.00
Mar 16, 2011
Page 2 of 6


Part Number NP75P04YLG
Description N-Channel MOSFET
Maker Renesas
Total Page 8 Pages
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