R5F11CBC Datasheet | Renesas

RL78/I1E RENESAS MCU 1. OUTLINE 1.1 Features Ultra-low power consumption technology VDD= 2.4 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high speed (0.03125 s: @ 32 MHz operation with high-speed on-chip oscillator or PLL clock)Note to ultra-low speed (1 s: @ 1 MHz operation with highspeed on-chip oscillator or PLL clock) Multiply/divide/multiply & accumulate instructions are supported. Address space: 1 MB General-purpose registers: (8-bit register  8)  4 banks On-chip RAM: 8 KB Note For industrial applications (M; TA = - 40 to +125C): 0.04167 s @ 24 MHz operation with high-speed on-chip oscillator or PLL clock Code flash memory Code flash memory: 32 KB Block size: 1 KB Prohibition of block erase and rewriting (security function) On-chip debug function Self-programming (with boot swap function/flash shield window function) Data flash memory Data flash memory: 4 KB Back ground operation (BGO): Instructions can be executed from the program memory while rewriting the data flash memory. Number of rewrites: 1,000,000 times (TYP.) Voltage of rewrites: VDD = 2.4 to 5.5 V R01DS0274EJ0110 Rev. 1.10 Jun 30, 2016 High-speed on-chip oscillator Select from 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz High accuracy: ±2.0% (VDD = 2.4 to 5.5 V, TA = - 40 to +105C) ±3.0% (VDD = 2.4 to 5.5 V, TA = - 40 to +125C) Operating ambient temperature TA = - 40 to +105C (G: Industrial applications) TA = - 40 to +125C (M: Industrial applications) Power management and reset function On-chip power-on-reset (POR) circuit On-chip voltage detector (LVD) (Select interrupt and reset from 7 levels) Data transfer controller (DTC) Transfer modes: Normal transfer mode, repeat transfer mode, block transfer mode Activation sources: Activated by interrupt sources. Chain transfer function Event link controller (ELC) Event signals of 16 types can be...