R5F52201BDFM, R5F52206BDFP - 32-MHz 32-bit RX MCUs

Renesas

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R5F52201BDFM Datasheet Preview — This datasheet PDF includes multiple part numbers: R5F52201BDFM, R5F52206BDFP. Please refer to the document for exact specifications by model.

Datasheet Details

Part number	R5F52201BDFM, R5F52206BDFP
Manufacturer	Renesas
File Size	1.00 MB
Description	32-MHz 32-bit RX MCUs
Datasheet	R5F52206BDFP_Renesas.pdf
Note	This datasheet PDF includes multiple part numbers: R5F52201BDFM, R5F52206BDFP. Please refer to the document for exact specifications by model.

R5F52201BDFM Product details

Description

Maximum operating frequency: 32 MHz 32-bit RX CPU Minimum instruction execution time: One instruction per state (cycle of the system clock) Address space: 4-Gbyte linear Register General purpose: Sixteen 32-bit registers Control: Eight 32-bit registers Accumulator: One 64-bit register Basic instructions: 73 DSP instructions: 9 Addressing modes: 10 Data arrangement Instructions: Little endian Data: Selectable as little endian or big endian On-chip 32-bit multiplier:

Features

32-bit RX CPU core.
Max. operating frequency: 32 MHz.
Capable of 49 DMIPS in operation at 32 MHz.
Accumulator handles 64-bit results (for a single instruction) from 32- × 32-bit operations.
Multiplication and division unit handles 32- × 32-bit operations (multiplication instructions take one CPU clock cycle).
Fast interrupt.
CISC Harvard architecture with 5-stage pipeline.
Variable-length instructions, ultra-compact code.
On-chip debugging circuit.

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Published: Jun 3, 2012 |