R5F523T3ADFM Datasheet | Renesas

RX23T Group Renesas MCUs R01DS0248EJ0110 Rev.1.10 Jan 13, 2016 40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS, 12-bit ADC (equipped with three S/H circuits, double data registers, and parator) 40MHz PWM (three-phase plementary output × 2ch) Features - 32-bit RX CPU core - Max. operating frequency: 40 MHz Capable of 65.6 DMIPS in operation at 40 MHz - Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiply-subtract instructions supported - Built-in FPU: 32-bit single-precision floating point (pliant to IEEE754) - Divider (fastest instruction execution takes two CPU clock cycles) - Fast interrupt - CISC Harvard architecture with 5-stage pipeline - Variable-length instructions, ultra-pact code - On-chip debugging circuit - Memory protection unit (MPU) supported - Low power design and architecture - Operation from a single 2.7-V to 5.5-V supply - Three low power consumption modes - On-chip code flash memory, no wait states - 128-/64-Kbyte capacities - On-board or off-board user programming - On-chip SRAM, no wait states - 12 Kbytes of SRAM - DMA - DTC: Four transfer modes - Reset and supply management - Seven types of reset, including the power-on reset (POR) - Low voltage detection (LVD) with voltage settings - Clock...