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Renesas Electronics Components Datasheet

R5F563TBAGFH Datasheet

MCUs

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Features
DATASHEET
RX63T Group
Renesas MCUs
R01DS0087EJ0210
Rev.2.10
100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS,
Sep 26, 2013
Two 12-bit ADCs (three S/H circuits, double data registers, amplifier, comparator), one 10-bit ADC, simultaneous
sampling on 7 channels using three ADCs, 100 MHz PWM (2 three-phase complementary channels + 4 single-phase
complementary channels or 3 three-phase complementary channels + 1 single-phase complementary channel)
Features
32-bit RX CPU core
Max. operating frequency: 100 MHz
Capable of 165 DMIPS in operation at 100 MHz
Single precision 32-bit IEEE-754 floating point
Two types of multiply-and-accumulation unit (between memories
and between registers)
32-bit multiplier (fastest instruction execution takes one CPU clock
cycle)
Divider (fastest instruction execution takes two CPU clock cycles)
Fast interrupt
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions: Ultra-compact code
Supports the memory protection unit (MPU)
Two types of debugging interfaces: JTAG and FINE (two-line)
Low-power design and architecture
Single 3.3-V supply or single 5-V supply; 3.3-V products can be
used with a 5-V analog power supply
Four low-power modes
On-chip main flash memory, no wait states
100-MHz operation, 10-ns read cycle (no wait states)
Max. 512 Kbytes
User code is programmable by USB, SCI, or JTAG.
On-chip data flash memory
Max. 32 Kbytes, reprogrammable up to 100,000 times
Programming/erasing as background operations (BGOs)
On-chip SRAM, no wait states
Max. 48 Kbytes
For instructions and operands
DMA
DMA: Incorporates four channels
DTC: A single unit can handle transfer on multiple channels.
Reset and supply management
Power-on reset (POR)
Low voltage detection (LVD) with voltage settings
Clock functions
External crystal oscillator or internal PLL for operation at 4 to 12.5
MHz
Internal 125-kHz LOCO
Dedicated 125-kHz LOCO for the IWDT
Independent watchdog timer
125-kHz LOCO clock operation
Useful functions for IEC60730 compliance
Oscillation-stop detection, frequency measurement, CRC, IWDT,
self-diagnostic function for the A/D converter, etc.
External address space
4 CS areas (4 × 1 Mbyte)
Multiplexed address data or separate address lines are selectable per
area.
8- or 16-bit bus space is selectable per area.
PLQP0144KA-A 20 × 20mm, 0.5mm pitch
PLQP0120KA-A 16 × 16mm, 0.5mm pitch
PLQP0112JA-A 20 × 20mm, 0.65mm pitch
PLQP0100KB-A 14 × 14mm, 0.5mm pitch
PLQP0064KB-A 10 × 10mm, 0.5mm pitch
PLQP0048KB-A 7 × 7mm, 0.5mm pitch
Up to 11 communications interfaces
USB 2.0 full-speed function interface (1 channel)
CAN (compliant with ISO11898-1), incorporating 32 mailboxes (1
channel)
SCI with multiple functionalities (5 channels)
Choose from among asynchronous mode, clock-synchronous mode,
smart-card interface mode, simple SPI, simple I2C, and extended
serial mode.
I2C bus interface for SMBus (2 channels)
RSPI for high-speed transfer (2 channels)
Up to twenty 16-bit timers
16-bit MTU3: 100-MHz operation, input capture, output compare,
three-phase complementary PWM waveform output (2 channels),
phase-counting mode (8 channels); complementary PWM does not
burden the CPU.
16-bit GPT: 100-MHz operation, input capture, output compare, 4-
channel single-phase complementary PWM waveform output or 1-
channel three-phase complementary + 1-channel single-phase
complementary output, interlocking with comparator (counter
operation, PWM negation control), detection of abnormal oscillation
frequencies (useful for IEC60730 compliance)
(8 channels); complementary PWM does not burden the CPU.
16-bit CMT (4 channels)
Generation of delays in PWM waveforms (for
products with the product ID code 1)
The timing with which signals on the 16-bit GPT PWM output pin
rise and fall can be controlled with an accuracy of up to 312 ps (in
operation at 100 MHz).
Two A/D converters for 1-MHz operation, total of 8
channels
Simultaneous sampling on 7 channels is possible with three units.
Self-diagnosis function (useful for IEC60730 compliance)
Two 12-bit ADCs: three sample-and-hold circuits, double data
registers, amplifier, comparator (8 channels)
One 10-bit ADC (12 channels)
One A/D converter for 2-MHz operation, total of 20
channels
One 10-bit ADC (20 channels)
10-bit D/A converter: 2 channels
Digital Power Supply Controller-Dedicated
Calculation Function (for products with product ID
code 1)
16-bit fixed-point calculation function that handles compensatory
calculations in the method of digital control for switched-mode
power supplies.
Register write protection function can protect values
in important registers against overwriting.
Up to 110 pins for GPIO
Open drain, switchable driving ability
Operating temp. range
–40C to +85C
–40C to +105C
R01DS0087EJ0210 Rev.2.10
Sep 26, 2013
Page 1 of 182


Renesas Electronics Components Datasheet

R5F563TBAGFH Datasheet

MCUs

No Preview Available !

RX63T Group
1. Overview
1. Overview
1.1 Outline of Specifications
Table 1.1 lists the specifications in outline, and Table 1.2 lists the functions of products.
Table 1.1 shows an outline of the maximum specifications, and the available peripheral modules and number of
channels differ according to the number of pins on the package and the ROM capacity. For details, see Table 1.2,
Comparison of Functions for Different Packages.
Table 1.1
Outline of Specifications (1/7)
Classification Module/Function
CPU
CPU
Memory
FPU
ROM
RAM
E2 data flash
Description
Maximum operating frequency: 100 MHz
32-bit RX CPU
Minimum instruction execution time: One instruction per state (cycle of the system
clock)
Address space: 4-Gbyte linear
Register set of the CPU
General purpose: Sixteen 32-bit registers
Control: Nine 32-bit registers
Accumulator: One 64-bit register
Basic instructions: 73
Floating-point operation instructions: 8
DSP instructions: 9
Addressing modes: 10
Data arrangement
Instructions: Little endian
Data: Selectable as little endian or big endian
On-chip 32-bit multiplier: 32 × 32 64 bits
On-chip divider: 32 / 32 32 bits
Barrel shifter: 32 bits
Memory protection unit (MPU)
Single precision floating point (32 bits)
Data types and floating-point exceptions in conformance with the IEEE754 standard
Capacity: 512 Kbytes, 384 Kbytes, 256 Kbytes, 64 Kbytes, 48 Kbytes, 32 Kbytes
100 MHz, no-wait access
On-board programming: Programs can be modified through SCI or USB while the MCU
is mounted on the board.
Off-board programming: Programs can be modified using parallel programmer.
(only in 144-, 120-, 112- and 100-pin versions)
Capacity: 48 Kbytes, 32 Kbytes, 24 Kbytes, 8 Kbytes
100 MHz, no-wait access
Capacity: 32 Kbytes, 8 Kbytes
Programming/erasing: 100,000 times
On-board programming:
Programs can be modified through SCI or USB while the MCU is mounted on the board.
Programming from the user program is possible.
MCU operating modes
[144-, 120-, 112- and 100-pin versions]
Single-chip mode, on-chip ROM enabled extended mode, on-chip ROM disabled
extended mode (switchable by software)
[64- and 48-pin versions]
Single-chip mode
R01DS0087EJ0210 Rev.2.10
Sep 26, 2013
Page 2 of 182


Part Number R5F563TBAGFH
Description MCUs
Maker Renesas
Total Page 30 Pages
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