Description
Maximum operating frequency: up to 32 MHz
Arm Cortex-M0+:
- Revision: r0p1-00rel0 - Armv6-M architecture profile - Single-cycle integer multiplier.
SysTick timer - Driven by SYSTICCLK (LOCO) or ICLK.
Features
- Features.
- Arm Cortex-M0+ Core.
- Armv6-M architecture.
- Maximum operating frequency: 32 MHz.
- Debug and Trace: DWT, BPU, CoreSightâ„¢ MTB-M0+.
- CoreSight Debug Port: SW-DP.
- Memory.
- 128-KB code flash memory.
- 4-KB data flash memory (100,000 erase/write cycles).
- Up to 16-KB SRAM.
- 128-bit unique ID.
- Connectivity.
- USB 2.0 Full-Speed Module (USBFS) - On-chip transceiver with voltage regulator - Compliant with USB Battery Charging Specification 1.2.