Maximum operating frequency: up to 100 MHz
Arm Cortex-M33 core:
Armv8-M architecture with security extension
Revision: r0p4-00rel0
Arm Memory Protection Unit (Arm MPU)
Protected Memory System Architecture (PMSAv8)
Secure MPU (MPU_S): 8 region
Key Features
Arm® Cortex®-M33 Core.
Armv8-M architecture with the main extension.
Maximum operating frequency: 100 MHz.
Arm Memory Protection Unit (Arm MPU).
Protected Memory System Architecture (PMSAv8).
Secure MPU (MPU_S): 8 regions.
Non-secure MPU (MPU_NS): 8 regions.
SysTick timer.
Embeds two Systick timers: Secure and Non-secure instance.
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
RA4M2. For precise diagrams, and layout, please refer to the original PDF.
RA4M2 Group Renesas Microcontrollers R01DS0367EJ0110 Rev.1.10 Jan 27, 2021 Leading-performance 100 MHz Arm Cortex-M33 core, up to 512 KB code flash memory with background...
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Hz Arm Cortex-M33 core, up to 512 KB code flash memory with background operation, 8 KB Data flash memory, and 128 KB SRAM with Parity/ECC. High-integration with USB 2.0 Full-Speed, SDHI, Quad SPI, and advanced analog. Integrated Secure Crypto Engine with cryptography accelerators, key management support, tamper detection and power analysis resistance in concert with Arm TrustZone for integrated secure element functionality.