RC21012A Datasheet | Renesas

Features - 169fs RMS phase jitter (10k Hz - 20MHz, 156.25MHz) - PCIe® Gen6 mon Clock (CC) 27fs RMS - PCIe SRIS and SRNS support - 1k Hz to 650MHz LVDS/LP-HCSL outputs 008 A/012A XIN_REFIN XOUT_REFINb CLKIN0_GPI0 CLKIN0b_GPI1 CLKIN1_GPI2 CLKIN1b_GPI3 APL L GPIO[4:0] SCL_SCLK SDA_n CS GPIO Ser ial Por t OTP Use r Cfgs Registe rs A. IOD0 is n/a on 008 devices MUX MUX - 1k Hz to 200MHz LVCMOS outputs - Simple AC-coupling to LVPECL and CML - LP-HCSL integrates 100 or 85 terminations - Programmable General Purpose Inputs (GPI × 4) and General Purpose Input/Outputs (GPIO × 5) - 1MHz I2C, 400k Hz SMBus or 20MHz SPI Support - Configuration via internal One-Time Programmable (OTP) memory (up to 27 different configurations), serial interface, or external I2C EEPROM. - Factory programmable internal OTP - 1.8V, 2.5V, 3.3V, -40° to +85°C operation - RC21012A - 12 differential/24 single-ended outputs - 6 × 6 mm 48-QFN package - RC21008A - 8 differential/16 single-ended outputs - 5 × 5 mm 40-QFN package with optional integrated crystal IOD0A IOD1 SSC F...