R1LV0416C-I Datasheet | Renesas

Description The R1LV0416C-I is a 4-Mbit static RAM organized 256-kword × 16-bit. R1LV0416C-I Series has realized higher density, higher performance and low power consumption by employing CMOS process technology (6-transistor memory cell). The R1LV0416C-I Series offers low power standby power dissipation; therefore, it is suitable for battery backup systems. It has packaged in 44-pin TSOP II. Features - Single 2.5 V and 3.0 V supply: 2.2 V to 3.6 V - Fast access time: 55/70 ns (max) - Power dissipation:  Active: 5.0 m W/MHz (typ)(VCC = 2.5 V) : 6.0 m W/MHz (typ) (VCC = 3.0 V)  Standby: 1.25 µW (typ) (VCC = 2.5 V) : 1.5 µW (typ) (VCC = 3.0 V) - pletely static memory.  No clock or timing strobe required - Equal access and cycle times - mon data input and output.  Three state output - Battery backup operation.  2 chip selection for battery backup - Temperature range: - 40 to +85°C Rev.2.00, May.26.2004, page 1 of 16 R1LV0416C-I Series Ordering Information Type No. R1LV0416CSB-5SI R1LV0416CSB-7LI Access time 55 ns 70 ns Package 400-mil 44-pin plastic TSOP II (44P3W-H) Rev.2.00, May.26.2004, page 2 of 16 R1LV0416C-I Series Pin Arrangement 44-pin TSOP A4 A3 A2 A1 A0 CS1# I/O0 I/O1 I/O2 I/O3 V CC V SS I/O4 I/O5 I/O6 I/O7 WE# A17 A16 A15 A14 A13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 (Top view) 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE# UB# LB# I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 CS2 A8 A9 A10 A11 A12 Pin Description Pin name A0 to A17 I/O0 to I/O15 CS1# (CS1) CS2 OE# (OE) WE# (WE) LB# (LB) UB# (UB) VCC VSS Function Address input Data input/output Chip select 1 Chip select 2 Output enable Write enable Lower byte select Upper byte select Power supply Ground Rev.2.00, May.26.2004, page 3 of 16 R1LV0416C-I Series Block Diagram LSB V CC V SS - - - - - A12 A11 A10 A9 A8 A13 Row decoder A14 A15 A16 A17 MSB A7 Memory matrix 2,048 x 2,048 I/O0 Input data control I/O15 - - Column I/O Column...