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R8A66174SP - PARALLEL-IN SERIAL-OUT DATA BUFFER

General Description

The R8A66174 is a CMOS LSI with 63-byte FIFO (First-In First-Out Memory).

The commands or up to 63bytes data can be stored from 8-bit data bus.

Key Features

  • General-purpose www. DataSheet4U. com 8-bit CPU bus compatible.
  • Built-in 63-byte FIFO.
  • High-speed output (10Mbps).
  • It’s able to connect to LED array driver such as R8A66160 or R8A66161 directly.
  • Low-noise, high-output circuit IOL=16mA, IOH=-16mA (IOL=4mA, IOH=-4mA for /INT).
  • Schmitt input (/RESET).
  • Wide operating supply voltage range (Vcc=3.0~3.6V or Vcc=4.5~5.5V) o.
  • Wide operating temperature range (Ta=-40~85 C).

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Datasheet Details

Part number R8A66174SP
Manufacturer Renesas
File Size 501.81 KB
Description PARALLEL-IN SERIAL-OUT DATA BUFFER
Datasheet download datasheet R8A66174SP Datasheet

Full PDF Text Transcription for R8A66174SP (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for R8A66174SP. For precise diagrams, and layout, please refer to the original PDF.

R8A66174SP PARALLEL-IN SERIAL-OUT DATA BUFFER WITH FIFO REJ03F0278-0101 Rev. 1.01 Oct.06.2008 DESCRIPTION The R8A66174 is a CMOS LSI with 63-byte FIFO (First-In First-Out...

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PTION The R8A66174 is a CMOS LSI with 63-byte FIFO (First-In First-Out Memory). The commands or up to 63bytes data can be stored from 8-bit data bus. The data stored in FIFO can be outputted as serial data by executing command, and when the stored data is outputted all, R8A66174 will output an interrupt request signal. R8A66174 has 2-bit output pins (/OE, LATCH) which can set/reset outside devices by the command, R8A66174 can be connected to peripheral circuits that have a serial latch structure. R8A66174 is the succession product of M66300. FEATURES ● General-purpose www.DataSheet4U.

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