R65C24 Description
The R65C24 Peripheral Interface A dapter/T im er (PIAT) is designed to solve a broad range of peripheral control problems in the implementation of microputer systems. This device allows a very effective tra d e o ff between software and hardware by pro viding significant capability and flexibility in a low cost chip. When coupled with the power and speed of the R6500, R6500/ or R65COO family of microprocessors, the...
R65C24 Key Features
- Low power CMOS N-wefl sillicon gate technology
- Two 8-bit bidirectional I/O ports with individual data direction control
- Programmable 16-bit Counter/Timer with eight modes of operation
- Three 8-bit latches associated with the Counter/Timer
- Selectable divide-by-sixteen prescaler for all modes
- Automatic "H andshake" control of data transfers
- Three interrupts with program control
- Port A
- Port B
- Counter/Timer 1, 2, 3, and 4 MHz versions