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74AC10
TRIPLE 3-INPUT NAND GATE
PRELIMINARY DATA
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wiring C2MOS technology. It is ideal for low power applications mantaining high speed s operation similar to equivalent Bipolar Schottky TTL. s The internal circuit is composed of 3 stages including buffer output, which enables high noise s immunity and stable output. All inputs and outputs are equipped with DESCRIPTION protection circuits against static discharge, giving The AC10 is an advanced high-speed CMOS www.DataSheet4U.com TRIPLE 3-INPUT NAND GATE fabricated with them 2KV ESD immunity and transient excess sub-micron silicon gate and double-layer metal voltage.
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HIGH SPEED: tPD = 4 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.
74AC10 Datasheet
