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74VHC74 Datasheet - STMicroelectronics

74VHC74 Dual D-Type Flip-Flop

The 74VHC74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. A signal on the D INPUT is transfered to the Q OUTPUT during the positive going transition of the clock pulse. PIN CONNECTIO.

® 74VHC74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR s s s s s s s s s HIGH SPEED: fMAX =170 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74 IMPROVED LATCH-UP IMMUNITY M (Micro Package) .

74VHC74 Datasheet (75.28 KB)