7NM60N
Overview
- The value is rated according Rthj-case c
- 100% avalanche tested u
- Low input capacitance and gate charge rod
- Low gate input resistance te P Application le
- Switching applications bso Description - O This device is an N-channel Power MOSFET ) developed using the second generation of t(s MDmesh™ technology. This revolutionary Power c MOSFET associates a vertical structure to the u company’s strip layout to yield one of the world’s d lowest on-resistance and gate charge. It is ro therefore suitable for the most demanding high Obsolete P efficiency converters. 87 5 11 4 12 14 1 PowerFLAT™ 5x5 Figure
- Internal schematic diagram
- Pin 1 14 13 12 11 G (not connected) S2 Drain 10 S S3 9S S4 5 6 7 8S
- Top view Table
- Device summary Order code STL7NM60N Marking 7NM60N Package PowerFLAT™ 5x5 Packaging Tape and reel November 2011 Doc ID 18348 Rev 2 1/13 13 Contents Contents
