DECADE COUNTER WITH 10 DECODED OUTPUTS
s MEDIUM SPEED OPERATION :
10 MHz (Typ.) at VDD = 10V
s FULLY STATIC OPERATION
s STANDARDIZED SYMMETRICAL OUTPUT
)s QUIESCENT CURRENT SPECIFIED UP TO
s 5V, 10V AND 15V PARAMETRIC RATINGS
ucs INPUT LEAKAGE CURRENT
dII = 100nA (MAX) AT VDD = 18V TA = 25°C
ros 100% TESTED FOR QUIESCENT CURRENT
Ps MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
teFOR DESCRIPTION OF B SERIES CMOS
bThe HCF4017B is a monolithic integrated circuit
Ofabricated in Metal Oxide Semiconductor
-technology available in DIP and SOP packages.
t(s)The HCF4017B is 5-stage Johnson counter
having 10 decoded outputs. Inputs include a
cCLOCK, a RESET, and a CLOCK INHIBIT signal.
uSchmitt trigger action in the clock input circuit
dprovides pulse shaping that allows unlimited clock
roinput pulse rise and fall times. This counter is
Padvanced one count at the positive clock signal
tetransition if the CLOCK INHIBIT signal is low.
Counter advanced via the clock line is inhibited
when the CLOCK INHIBIT signal is high. A high
RESET signal clears the counter to its zero count.
Use of the Johnson decade-counter configuration
permits high speed operation, 2-input decimal
decode gating and spike-free decoded outputs.
Anti-lock gating is provided, thus assuring proper
counting sequence. The decoded outputs are
normally low and go high only at their respective
decoded time slot. Each decoded output remains
high for one full clock cycle. A CARRY - OUT
signal completes one cycle every 10 clock input
cycles and is used to ripple-clock the succeeding
device in a multi-device counting chain.