M54HC699 Datasheet | STMicroelectronics

DESCRIPTION The HC696/697 are high speed CMOS up/down counters fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The HC696/698 are BCD DECADE COUNTER, and the HC697/699 are 4-BIT BINARY COUNTER. Both devices have register. They count on the positive edge of the counter clock input (CCK) when selected by the ”Counter Mode”. If the input U/D is held ”H”, the internal counter counts up, and held ”L”, counts down. The internal counter’s outputs are stored in the output register at the positive edge of register clock (RCK). The counter features enable P and enable T and a ripple-carry output for easy expansion. the register/counter select input, R/C, selects the counter when low or the register when high for the three state outputs, QA, QB, Qc and QD. Both the counter clock CCK and register clock RCK are positive-edge triggered. The counter clear CCLR is active low and is synchronous for HC698/699, and asynchronous for HC696/697. All inputs are equipped with protection circuits against static discharge and transient excess voltage. March 1993 PIN CONNECTIONS (top view) NC = No Internal Connection 1/22 M54/M74HC696/697/698/699 PIN DESCRIPTION PIN No 1 2 3, 4, 5, 6 7, 14 8 9 11 12 13 15, 16, 17, 18 19 10 20 SYMBOL U/D CCK A to D EMP/ENT CCLR RCK R/C G LOAD QA to QD RCO GND V CC NAME AND FUNCTION Up Down Counter Selector Counter Clock Data Inputs Enable P and T Counter Clear (Active LOW) Register Clock Register Counter Selector Enable Input Load Counter (Active LOW) Data Outputs Load Counter (Active HIGH) Ground (0V) Positive Supply Voltage INPUT AND OUTPUT EQUIVALENT CIRCUIT IEC LOGIC SYMBOL HC696 HC697 HC698 HC699 2/22 M54/M74HC696/697/698/699 TRUTH TABLE INPUTS CCLR LOAD ENP X X X L H H H H H H X X (- ) X Z a-d a’-d’ OUTPUTS U/D X X X X X H L X X X RCK X X X X X X X X R/C X L L L L L L L H H G H L L L L L L L L L QA Z L a QB Z L QC Z L QD Z L...