4 mbit (512k x8) / 5v asynchronous sram.
SUMMARY s SUPPLY VOLTAGE: 4.5 to 5.5V
s s s s s s
Figure 1. Packages
512K x 8 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55ns LOW STANDBY CURRENT LOW VC.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Figure 2. Logic Diagram . . . . . . . . . . . . . . . Table 1. Signal Names . . . . . . . . . . . . . . . . Figure 3. TSOP and SO .
Image gallery
TAGS