M68Z512 - 4 Mbit 512Kb x8 Low Power SRAM with Output Enable

ST Microelectronics

Datasheet Details

Part number	M68Z512
Manufacturer	STMicroelectronics
File Size	92.97 KB
Description	4 Mbit 512Kb x8 Low Power SRAM with Output Enable
Datasheet	M68Z512_STMicroelectronics.pdf

The M68Z512 is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits.

fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 5V ±10% supply, and all inputs and outputs are TTL compatible. This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected. The M68Z512 is available in a 32 lead TSOP II (10 x 20mm) package. Table 1. Signal Names A0-A18 DQ0-DQ7 E G W VCC VSS Address Inputs VCC 19 A0-A18 8 DQ0-DQ7 W E G M68Z512 Data Input/Outpu.

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Published: May 6, 2005 |