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STMicroelectronics Electronic Components Datasheet

M74HC75 Datasheet

4 BIT D TYPE LATCH

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M74HC75 pdf
. HIGH SPEED
tPD = 10 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 2 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH= IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC = (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS75
DESCRIPTION
The M54/74HC75 is a high speed CMOS 4-BIT D-
TYPE LATCH fabricated in silicon gate C2MOS tech-
nology. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. It contains two groups of 2-bit latches con-
trolled by an enable input (G12 or G34). These two
latch groups can be used in different circuits. Each
latch has Q and Q outputs (1Q - 4Q and 1Q - 4Q).
The data applied to the data input is transfered to the
Q and Q outputs when the enable input is taken high
and the outputs will follow the data input as long as
the enable input is kept high. When the enable input
is taken low, the information data applied to the data
input is retained at the outputs. All inputs are
equipped with protection circuits against static dis-
charge and transient excess voltage.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
M54HC75
M74HC75
4 BIT D TYPE LATCH
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC75F1R
M 74H C7 5M 1R
M 74HC 75 B1 R
M 74H C7 5C 1R
PIN CONNECTIONS (top view)
December 1992
NC =
No Internal
Connection
1/9


STMicroelectronics Electronic Components Datasheet

M74HC75 Datasheet

4 BIT D TYPE LATCH

No Preview Available !

M74HC75 pdf
M54/M74HC75
TRUTH TABLE
INPUTS
DG
LH
HH
XL
OUTPUTS
QQ
LH
HL
Qn Qn
FUNCTION
LATCH
PIN DESCRIPTION
PIN No SYMBOL
1, 14, 11, 8 1Q to 4Q
2, 3, 6, 7
4
1D to 4D
G3 4
13 G1 2
16, 15, 10, 9
12
5
1Q to 4Q
GND
VCC
NAME AND FUNCTION
Complementary Latch
Outputs
Data Inputs
Latch Enable Input,
latches 3 and 4
Latch Enable Input,
latches 1 and 2
Latch Outputs
Ground (0V)
Positive Supply Voltage
SCHEMATIC CIRCUIT
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC Supply Voltage
-0.5 to +7
V
VI DC Input Voltage
-0.5 to VCC + 0.5
V
VO DC Output Voltage
-0.5 to VCC + 0.5
V
IIK DC Input Diode Current
IOK DC Output Diode Current
± 20 mA
± 20 mA
IO DC Output Source Sink Current Per Output Pin
± 25 mA
ICC or IGND DC VCC or Ground Current
± 50 mA
PD Power Dissipation
500 (*)
mW
Tstg Storage Temperature
-65 to +150
oC
TL Lead Temperature (10 sec)
300 oC
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC
2/9


Part Number M74HC75
Description 4 BIT D TYPE LATCH
Maker ST Microelectronics
Total Page 9 Pages
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