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P6NA60 - STP6NA60

General Description

This series of POWER MOSFETS represents the most advanced high voltage technology.

The optimized cell layout coupled with a new proprietary edge termination concur to give the device low RDS(on) and gate charge, unequalled ruggedness and superior switching performance.

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Full PDF Text Transcription for P6NA60 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for P6NA60. For precise diagrams, and layout, please refer to the original PDF.

www.DataSheet4U.com STP6NA60 STP6NA60FI N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR TYPE STP6NA60 STP6NA60FI s s s s s s s VDSS 600 V 600 V R DS(on) < 1.2 Ω < ...

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STP6NA60 STP6NA60FI s s s s s s s VDSS 600 V 600 V R DS(on) < 1.2 Ω < 1.2 Ω ID 6.5 A 3.9 A TYPICAL RDS(on) = 1 Ω ± 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100oC LOW INTRINSIC CAPACITANCES GATE GHARGE MINIMIZED REDUCED THRESHOLD VOLTAGE SPREAD TO-220 3 1 2 3 1 2 DESCRIPTION This series of POWER MOSFETS represents the most advanced high voltage technology. The optimized cell layout coupled with a new proprietary edge termination concur to give the device low RDS(on) and gate charge, unequalled ruggedness and superior switching performance.