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SPEAR-09-H042 - large IP portfolio SoC

General Description

SPEAr Head200 is a powerful digital engine belonging to SPEAr family, the innovative customizable system-on-chip.

Key Features

  • ARM926EJ-S - fMAX 266 MHz, 32 KI - 16 KD cache, 8 KI - KD TCM, ETM9 and JTAG interfaces 200K customizable equivalent ASIC gates (16K LUT equivalent) with 8 channels internal DMA high speed accelerator function and 87 dedicated general purpose I/Os Multilayer AMBA 2.0 compliant bus with fMAX 133 MHz Programmable internal clock generator with enhanced PLL function, specially optimized for E. M. I. reduction 16 KB single port SRAM embedded Dynamic RAM interface: 8/16 bit DDR, 8/16 bit SDRAM SP.

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Full PDF Text Transcription for SPEAR-09-H042 (Reference)

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SPEAR-09-H042 SPEAr™ Head200 ARM 926, 200 K customizable eASIC™ gates, large IP portfolio SoC Data Brief Features ■ ARM926EJ-S - fMAX 266 MHz, 32 KI - 16 KD cache, 8 KI -...

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rief Features ■ ARM926EJ-S - fMAX 266 MHz, 32 KI - 16 KD cache, 8 KI - KD TCM, ETM9 and JTAG interfaces 200K customizable equivalent ASIC gates (16K LUT equivalent) with 8 channels internal DMA high speed accelerator function and 87 dedicated general purpose I/Os Multilayer AMBA 2.0 compliant bus with fMAX 133 MHz Programmable internal clock generator with enhanced PLL function, specially optimized for E.M.I. reduction 16 KB single port SRAM embedded Dynamic RAM interface: 8/16 bit DDR, 8/16 bit SDRAM SPI interface connecting serial ROM and Flash devices 2 USB 2.0 Host independent ports with integrated PHYs USB 2.