ST33G384A Datasheet | STMicroelectronics

ST33Gxxx A Secure MCU with 32-bit ARM® Secur Core® SC300™ CPU, SWP interface and high-density Flash memory, automotive grade Data brief DFN8 6 × 5 mm Features Hardware Features - ARM® Secur Core® SC300™ 32-bit RISC core cadenced at 25 MHz - 30 Kbytes of user RAM - Up to 1280 Kbytes of user Flash memory with OTP area - Asynchronous receiver transmitter supporting ISO/IEC 7816-3 T=0 and T=1 protocols (Slave mode supported) - Single wire protocol (SWP) interface for munications with NFC router (ETSI 102-613 pliant) - Serial peripheral interface (SPI) master/slave interface - Three 16-bit timers with interrupt capability - Seven general-purpose I/Os enabling proprietary protocol implementation - 1.8 V, 3 V and 5 V supply voltage ranges - External clock frequency from 1 up to 10 MHz - Current consumption patible with GSM and ETSI specifications - Power-saving standby state - Contact assignment patible with ISO/IEC 7816-2 - ESD protection greater than 4 k V (HBM) Security Features - Active shield - Memory protection unit (MPU) - Monitoring of environmental parameters - Protection against faults - 16- and 32-bit CRC calculation block (ISO 13239, IEEE 802.3, etc.) - True random number...