STM8S207xx STMicroelectronics Datasheet

STM8S207xx Key Features

• Max fCPU: up to 24 MHz, 0 wait states @
• Advanced STM8 core with Harvard architecture and 3-stage pipeline
• Extended instruction set
• Max 20 MIPS @ 24 MHz
• Memories
• Program: up to 128 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
• Data: up to 2 Kbytes true data EEPROM; endurance 300 kcycles
• RAM: up to 6 Kbytes
• Clock, reset and supply management
• 2.95 to 5.5 V operating voltage