Download the K7B163635B datasheet PDF.
This datasheet also covers the K7B161835B variant, as both devices belong to the same 512kx36 & 1mx18 synchronous sram family and are provided as variant models within a single manufacturer datasheet.
General Description
The K7B163635B and K7B161835B are 18,874,368-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.
Key Features
Synchronous Operation.
On-Chip Address Counter.
Self-Timed Write Cycle.
On-Chip Address and Control Registers.
VDD= 2.5 or 3.3V +/- 5% Power Supply.
5V Tolerant Inputs Except I/O Pins.
Byte Writable Function.
Global Write Enable Controls a full bus-width write.
Power Down State via ZZ Signal.
LBO Pin allows a choice of either a interleaved burst or a linear burst.
Note: The manufacturer provides a single datasheet file (K7B161835B_SamsungElectronics.pdf) that lists specifications for multiple related part numbers.
Full PDF Text Transcription for K7B163635B (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
K7B163635B. For precise diagrams, and layout, please refer to the original PDF.
K7B163635B K7B161835B www.DataSheet4U.com 512Kx36 & 1Mx18 Synchronous SRAM 18Mb B-die Sync. SRAM Specification 100TQFP with Pb & Pb-Free (RoHS compliant) INFORMATION IN T...
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cification 100TQFP with Pb & Pb-Free (RoHS compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Samsung products, contact your nearest Samsung office. 2.
K7B163635B Datasheet
