Datasheet4U Logo Datasheet4U.com

K7A201800B - 64Kx36 & 64Kx32-Bit Synchronous Pipelined Burst SRAM

Download the K7A201800B datasheet PDF. This datasheet also covers the K7A-2036 variant, as both devices belong to the same 64kx36 & 64kx32-bit synchronous pipelined burst sram family and are provided as variant models within a single manufacturer datasheet.

Description

The K7A203600B, K7A203200B and K7A201800B are 2,359,296-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.

Features

  • Synchronous Operation.
  • 2 Stage Pipelined operation with 4 Burst.
  • On-Chip Address Counter.
  • Self-Timed Write Cycle.
  • On-Chip Address and Control Registers.
  • VDD= 3.3V+0.3V/-0.165V Power Supply.
  • VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.
  • 5V Tolerant Inputs Except I/O Pins.
  • Byte Writable Function.
  • Global Write Enable Controls a full bus-width write.
  • P.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (K7A-2036-00B.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
K7A161830B 512Kx36 & 1Mx18 Synchronous SRAM SAMSUNG ELECTRONICS
K7A163630B 512Kx36 & 1Mx18 Synchronous SRAM SAMSUNG ELECTRONICS
K7A403600M 128K x 36 Synchronous SRAM Samsung
K7A50D TK7A50D Toshiba Semiconductor
K7A60W TK7A60W Toshiba

Other Datasheets by Samsung Semiconductor

Part Number Description
K7A203200A 64Kx32-Bit Synchronous Pipelined Burst SRAM
K7A203200B 64Kx36/x32 Synchronous SRAM
K7A203600A 64Kx36-Bit Synchronous Pipelined Burst SRAM
K7A203600B 64Kx36/x32 Synchronous SRAM
K7A161800A 512K x 36 / x32 & 1M x 18 Synchronous SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
K7A203600B K7A203200B K7A201800B Document Title Preliminary 64Kx36/x32 & 128Kx18 Synchronous SRAM 64Kx36 & 64Kx32 & 128Kx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No 0.0 0.1 History 1. Initial draft 1. Add tCYC 250,225, 200MHz bin. Draft Date Dec. 10. 2001 Jan . 17. 2002 Remark Preliminary Preliminary The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any queswww.DataSheet4U.com tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. www.DataSheet4U.com -1- Jan 2002 Rev 0.
Published: |