Description
Pin Name K, K SAn DQn SW SWa SWb SWc SWd ZZ VDD VDDQ Pin Description Differential Clocks Synchronous Address Input Bi-directional Data Bus Synchronous Global Write Enable Synchronous Byte a Write Enable Synchronous Byte b Write Enable Synchronous Byte c Write Enable Synchronous Byte d Write Enable Asynchronous Power Down Core Power Supply Output Power Supply Pin Name VREF M 1 , M2 G SS TCK TMS TDI TDO ZQ VSS NC Pin Description HSTL Input Reference Voltage Read Protocol Mode Pins ( M1=VSS, M2=VDD
Features
- 512Kx36 or 1Mx18 Organizations.
 
- 2.5V Core/1.5V Output Power Supply (1.9V max VDDQ).
 
- HSTL Input and Output Levels.
 
- Differential, HSTL Clock Inputs K, K.
 
- Synchronous Read and Write Operation.
 
- Registered Input and Registered Output.
 
- Internal Pipeline Latches to Support Late Write.
 
- Byte Write Capability(four byte write selects, one for each 9bits).
 
- Synchronous or Asynchronous Output Enable.
 
- Power Down Mo.