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S3C72C8 - The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M

Description

Pin Name P0.0 P0.1 P0.2 P0.3 Pin Type I/O Description 4-bit I/O port.

1-bit and 4-bit read/write and test are possible.

Features

  • Memory.
  • 512 × 4-bit RAM (including LCD display RAM) 8,192 × 8-bit ROM Interrupts.
  • Four internal vectored interrupts Five external vectored interrupts Two quasi-interrupts 28 I/O Pins.
  • I/O: 26 pins (44-pin QFP, 42-pin SDIP) Output only: 2 pins (44-pin QFP) Bit Sequential Carrier.
  • Supports 16-bit serial data transfer in arbitrary format LCD Controller/Driver.
  • 12 segments and 8 common termina.

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Datasheet Details

Part number S3C72C8
Manufacturer Samsung Semiconductor
File Size 237.84 KB
Description The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Datasheet download datasheet S3C72C8 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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S3C72C8/P72C8 PRODUCT OVERVIEW 1 OVERVIEW PRODUCT OVERVIEW The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). With an up-to-96-dot LCD direct drive capability flexible 16-bit timer/counter, and 4-chanel comparator, the S3C72C8 offers an excellent design solution for a low CDP and a card reader. Up to 28 pins of the 44-pin QFP or up to 26 pins of the 42-pin SDIP package can be dedicated to I/O. Eight vectored interrupts provide fast response to internal and external events. In addition, the S3C72C8's advanced CMOS technology provides for low power consumption. OTP The S3C72C8 microcontroller is also available in OTP (One Time Programmable) version, S3P72C8.
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