S5T8554B codec equivalent, 1 chip codec.
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* Complete CODEC and filtering system Meets or exceeds AT&T D3/D4 and CCITT specifications µ-Law: S5T8554B, A-Law: S5T8557B On-chi.
VBB = −5V ± 5% Analog ground. Analog output of the receive power Amp. VCC = +5 V ± 5% Receive frame sync pulse. 8kHz pulse train PCM data input. Logic input which selects either 1.536MHz/1.544MHz or 2.048MHz for master clock in normal operation and B.
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