LC8784P7PB
Key Features
- Minimum Bus Cycle Time
- 74.04ns (CF = 13.5MHz) Note: Bus cycle time indicates the speed to read ROM
- Minimum Instruction Cycle Time (tCYC)
- 222ns (CF = 13.5MHz) Note: The minimum instruction cycle time: Minimum bus cycle time × 3
- Ports whose I/O direction can be designated in 2 bit units: 16 (PEn, PFn n=0 to
- Ports whose I/O direction can be designated in 4 bit units: 8 (P0n n=0 to
- Normal withstand voltage input ports: 1 (XT1)
- Internal low voltage output ports: 1 (VREG)
- Reset pin: 1 (RES)
- Digital power pins: 6 (VSSn, VDDn n=1
