HYS6472V4200GU module equivalent, 3.3v 4m x 64/72-bit 1 bank sdram module 3.3v 8m x 64/72-bit 2 bank sdram module.
6
Unit
Note
min. max. min. max. min. max.
Clock and Clock Enable
Clock Cyc.
One bank 4M x 64, 4Mx72 and two bank 8M x 64, 8M x 72 organisation Optimized for byte-write non-parity and ECC applicati.
100 Mhz 4M x 64 1 bank SDRAM module 100 MHz 4M x 72 1 bank SDRAM module 100 Mhz 8M x 64 2 bank SDRAM module 100 MHz 8M x 72 2 bank SDRAM module 100 Mhz 4M x 64 1 bank SDRAM module 100 Mhz 8M x 64 2 bank SDRAM module 66 Mhz 4M x 64 1 bank SDRAM modul.
Image gallery
TAGS
Download (Size : 76.09KB)
