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SDA3526-5 - Nonvolatile Memory 2K-Bit EPROM

Description

I2C Bus Interface The I2C Bus is a bidirectional 2-line bus for the transfer of data between various integrated circuits.

It consists of a serial data line SDA and a serial clock line SCL.

The data line requires an external pull-up resistor to VCC (open drain output stage).

Features

  • q Word-organized programmable nonvolatile memory in q q q q q q q q q n-channel floating-gate technology (E2PROM) 256 × 8-bit organization Supply voltage 5 V Serial 2-line bus for data input and output (I2C Bus) Reprogramming mode, 10 ms erase / write cycle Reprogramming by means of on-chip control (without external control) Check for end of programming process Programming protect mode Data retention > 10 years More than 104 reprogramming cycles per address P-DIP-8-1 Type SDA 3526-5 Ordering.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Nonvolatile Memory 2-Kbit E2PROM with I2C Bus and 2 K Write Protection SDA 3526-5 Preliminary Data MOS IC Features q Word-organized programmable nonvolatile memory in q q q q q q q q q n-channel floating-gate technology (E2PROM) 256 × 8-bit organization Supply voltage 5 V Serial 2-line bus for data input and output (I2C Bus) Reprogramming mode, 10 ms erase / write cycle Reprogramming by means of on-chip control (without external control) Check for end of programming process Programming protect mode Data retention > 10 years More than 104 reprogramming cycles per address P-DIP-8-1 Type SDA 3526-5 Ordering Code Q67100-H5099 Package P-DIP-8-1 Circuit Description I2C Bus Interface The I2C Bus is a bidirectional 2-line bus for the transfer of data between various integrated circuits.
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