* BUFFERED ADDRESS LINES
* ON CHIP LATCHES
* ON CHIP DECODING
* BIT MASKING CONTROL LINES
* ENABLE CONTROL LI NE
* OPEN COLLECTOR OUTPUTS WITH 40m.

SCRATCH PAD MEMORY BUFFER MEMORY ACCUMULATOR REGISTER CONTROL STORE Words are selected through a 5 input decoder when t.

The 82S21 is a TTL 64 bit Write-While-Read Random Access Memory organized in 32 words of 2 bits each. The 82S21 is ideally suited for high speed buffers and as the memory element in high speed accumulators. APPLICATIONS SCRATCH PAD MEMORY BUFFER MEM.

82S212

82S214

82S215

82S226

82S229

82S23

82S230

82S231

82S25

82S27

82S09

82S10

82S100