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SI5330 - LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

Datasheet Summary

Description

.

.9 3.1.

.9 3.2.

Features

  • 18 17 16 15 14 13 7 8 9 10 11 12.
  • Supports single-ended or differential input clock signals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs Provides signal level translation.
  • Differential to single-ended.
  • Single-ended to differential.
  • Differential to differential.
  • Single-ended to single-ended Wide frequency range.
  • LVPECL, LVDS: 5 to 710 MHz.
  • HCSL: 5 to 250 MHz.
  • SSTL, HSTL: 5 to.

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Datasheet Details

Part number SI5330
Manufacturer Silicon Laboratories
File Size 293.02 KB
Description LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Datasheet download datasheet SI5330 Datasheet
Additional preview pages of the SI5330 datasheet.

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Full PDF Text Transcription

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Si5330 1 . 8 / 2 . 5 / 3 .
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