Description
The Si53306 is an ultra low jitter four output differential buffer with pin-selectable output clock signal format.
Features
- 4 differential or 8 LVCMOS outputs.
- Independent VDD and VDDO :.
- Ultra-low additive jitter: 45 fs rms
1.8/2.5/3.3 V.
- Wide frequency range: 1 to 725 MHz.
- 1.2/1.5 V LVCMOS output support.
- Any-format input with pin selectable.
- Selectable LVCMOS drive strength to
output formats: LVPECL, low power tailor jitter and EMI performance
LVPECL, LVDS, CML, HCSL, LVCMOS.
- Synchronous output enable.
- Small size: 16-QFN (3 mm x 3 mm).
- RoHS compliant, Pb-f.
SI53306 Datasheet
