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SI5330 Datasheet Low-skew Clock Buffer/level Translator

Manufacturer: Silicon Laboratories

Overview: Si5330 1 . 8 / 2 . 5 / 3 . 3 V L O W - J I T T E R, L O W - S K EW C L O C K B U F F E R / L E V E L TR A N S L A T O.

Key Features

  • 18 17 16 15 14 13 7 8 9 10 11 12.
  • Supports single-ended or differential input clock signals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs Provides signal level translation.
  • Differential to single-ended.
  • Single-ended to differential.
  • Differential to differential.
  • Single-ended to single-ended Wide frequency range.
  • LVPECL, LVDS: 5 to 710 MHz.
  • HCSL: 5 to 250 MHz.
  • SSTL, HSTL: 5 to.

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Part Number Description
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