Download the SI53342 datasheet PDF.
This datasheet also covers the SI53340 variant, as both devices belong to the same low-jitter lvds fanout clock buffers family and are provided as variant models within a single manufacturer datasheet.
General Description
2.
The Si53340-45 are a family of low-jitter, low skew, fixed format (LVDS) buffers.
The Si53340/42/44 have a universal input that accepts most common differential or LVCMOS input signals, while the Si53341/43/45 accept only LVCMOS inputs.
Key Features
include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. KEY.
Full PDF Text Transcription for SI53342 (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
SI53342. For precise diagrams, and layout, please refer to the original PDF.
Si53340-45 Data Sheet Low-Jitter LVDS Fanout Clock Buffers with up to 10 LVDS Outputs from Any-Format Input and Wide Frequency Range from dc up to 1250 MHz The Si53340-45...
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t Input and Wide Frequency Range from dc up to 1250 MHz The Si53340-45 family of LVDS fanout buffers is ideal for clock/data distribution and redundant clocking applications. These devices feature typical ultra-low jitter of 50 fs and operate over a wide frequency range from dc to 1250 MHz. Built-in LDOs deliver high PSRR performance and reduces the need for external components simplifying low jitter clock distribution in noisy environments. They are available in multiple configurations and offer a selectable input clock using a 2:1 input mux. Other features include independent output enable and built-in format translation
SI53342 Datasheet
