Download Si5392 Datasheet PDF
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Si5392 Key Features

  • Generates any bination of output frequencies from any input frequency
  • Ultra low phase jitter
  • 69 fs RMS (Grade P)
  • 71 fs RMS (Grade E)
  • 85 fs RMS (integer mode)
  • 100 fs RMS (fractional mode)
  • Enhanced hitless switching minimizes output phase transients (0.2 ns typ)
  • Input frequency range
  • Differential: 8 kHz to 750 MHz
  • LVCMOS: 8 kHz to 250 MHz

Si5392 Description

Si5395/94/92 Data Sheet 12-Channel, Any-Frequency, Any-Output Jitter Attenuator/Clock Multiplier with Ultra-Low Jitter The Si5395/94/92 Jitter attenuators bine fourth-generation DSPLL™ and MultiSynth™ technologies to deliver ultra-low jitter (69 fs) for high performance applications like 56G SerDes. They are used in applications that demand the highest level of integration and jitter performance. All PLL ponents are...