CY28341 Datasheet PDF - SpectraLinear Universal Single-Chip Clock Solution Specs

CY28341 - Universal Single-Chip Clock Solution

Datasheet Summary

Description

Pin 3 4 1 XIN XOUT FS0/REF0 VDD VDD Name PWR I/O I O Description Oscillator Buffer Input.

Connect to a crystal or to an external clock.

Oscillator Buffer Output.

Features

>.
Spread Spectrum for best electromagnetic interference (EMI) reduction.
Watchdog feature for systems recovery.
SMBus-compatible for programmability.
56-pin SSOP and TSSOP packages Block Diagram XIN XOUT XTAL REF0 VDDR REF(0:1) VDDI CPUCS_T/C FS0 Pin Configuration[1].
FS0/REF0 VSSR XIN XOUT VDDAGP AGP0.
SELP4_K7/AGP1 AGP2 VSSAGP.
FS1/PCI_F.
SELSDR_DDR/PCI1.

Datasheet Details

Part number	CY28341
Manufacturer	SpectraLinear
File Size	309.45 KB
Description	Universal Single-Chip Clock Solution
Datasheet	CY28341 Datasheet
Additional preview pages of the CY28341 datasheet.

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Full PDF Text Transcription

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CY28341 Universal Single-Chip Clock Solution for VIA P4M266/KM266 DDR Systems Features • Supports VIA¥ P4M266/KM266 chipsets • Supports Pentium® 4, Athlon™ processors • Supports two DDR DIMMS www.DataSheet4U.com Table 1. Frequency Selection Table FS(3:0) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1100 1111 CPU 66.80 100.00 120.00 133.33 72.00 105.00 160.00 140.00 77.00 110.00 180.00 150.00 90.00 100.00 200.00 133.33 AGP 66.80 66.80 60.00 66.67 72.00 70.00 64.00 70.00 77.00 73.33 60.00 60.00 60.00 66.67 66.67 66.67 PCI 33.40 33.40 30.00 33.33 36.00 35.00 32.00 35.00 38.50 36.67 30.00 30.00 30.00 33.33 33.33 33.

Published: Oct 1, 2008 |