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TP5322 - P-Channel Vertical DMOS FET

Description

These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process.

Features

  • ! ! ! ! ! ! ! ! Low threshold, -2.4V max. High input impedance Low input capacitance, 110pFmax. Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage Complementary N- and P-channel devices.

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Datasheet Details

Part number TP5322
Manufacturer Supertex
File Size 331.12 KB
Description P-Channel Vertical DMOS FET
Datasheet download datasheet TP5322 Datasheet

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TP5322 TP5322 www.DataSheet4U.com Initial Release P-Channel Enhancement-Mode Vertical DMOS FET General Description These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown.
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