TC200E Datasheet | Toshiba

ASIC DATA BOOK TC200G/E SERIES MACROCELLS (Non-liner Delay Models) ASIC Data Book TC200G/E SERIES MACROCELLS (Non-linear Delay Models) Published in July, 1996 Document ID: 451V1CA (C) Copyright 1996 TOSHIBA Corporation All Rights Reserved The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or patent rights of TOSHIBA or others. TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. The products described in this document are strategic products subject to CO regulations They should not be exported without authorization from the appropriate governmental authorities. Preface This databook was written for logic and system designers who wish to use the TC200G/E Series Gate Array From Toshiba Corporation. TC200G/E Series Gate Array databook consist of the volumes listed below. This databook contains the specifications for each cell in the Verilog-HDL sign-off libraries (for use with Verilog-XL, VCS, etc.) and VHDL sign-off...