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TC358860XBG - Mobile Peripheral

Key Features

  • TC358860XBG follows the following standards:.
  • MIPI Alliance Specification for Display Serial Interface (DSI) version 1.1, Nov 22 2011.
  • MIPI Alliance Specification for D-PHY Version 1.1, Nov 7 2011.
  • VESA DisplayPort Standard version 1.2a, May 23 2012.
  • VESA Embedded DisplayPort Standard version 1.4 Feb. 28 2013.
  • eDP Sink (Receiver).
  • Bit Rate @ 1.62, 2.16, 2.7, 3.24, 4.32 or 5.4Gbps, Voltage Swing @0.2 to 1.2 V, PreEmphasis Level @3.5dB.
  • There are four lan.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TC358860XBG CMOS Digital Integrated Circuit Silicon Monolithic TC358860XBG Mobile Peripheral Devices Overview TC358860XBG TC358860XBG converts an Embedded Display Port (eDPTM) video stream into an MIPIĀ® DSI stream. There are four eDP main link lanes in TC358860XBG, they can toggle at either 1.62, 2.16, 2.7, 3.24, 4.32, or 5.4 Gbps/link to receive up to 17.28 Gbps (5.4 Gbps * 0.8 * 4) of video stream. The 4-data lanes dual link DSI Tx can transmit up to 8 Gbps (1 Gbps * 4 * 2) of video stream. P-TFBGA65-0505-0.50-001 Weight: 40 mg (Typ.) For input video stream with bandwidth (BW) < 4 Gbps, TC358860XBG can output the video data either with a single DSI link or performs left-right line split to output the video data stream with dual DSI links.