TC358860XBG Overview
TC358860XBG CMOS Digital Integrated Circuit Silicon Monolithic TC358860XBG Mobile Peripheral Devices Overview TC358860XBG TC358860XBG converts an Embedded Display Port (eDPTM) video stream into an MIPI® DSI stream. The 4-data lanes dual link DSI Tx can transmit up to 8 Gbps (1 Gbps 4 2) of video stream. P-TFBGA65-0505-0.50-001 Weight:.
TC358860XBG Key Features
- TC358860XBG follows the following standards
- MIPI Alliance Specification for Display Serial Interface (DSI) version 1.1, Nov 22 2011
- MIPI Alliance Specification for D-PHY Version 1.1, Nov 7 2011
- VESA DisplayPort Standard version 1.2a, May 23 2012
- VESA Embedded DisplayPort Standard version 1.4 Feb. 28 2013
- eDP Sink (Receiver)
- There are four lanes available in eDP main Link, which can operate in 1-, 2- or 4-lane configuration
- Support Single-Stream Transport (SST), not multi-Stream Transport (MST)
- Capable of Full and Fast Link Training
- AUX channel with nominal bit rate at 1 Mbps