TC4027BF Datasheet | Toshiba

TC4027BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4027BP, TC4027BF TC4027B Dual J-K Master-Slave Flip Flop TC4027B is J-K master-slave flip-flop having RESET and SET functions. In the case of J-K made, when the clock input is given with both RESET and SET at “L”, the output changes at rising edge of the clock according to the states of J and K. When SET input is placed at “H”, and RESET input is placed at “L”, outputs bee Q = “H”, and Q = “L”. When RESET input is placed at “H”, and SET input is placed at “L”, outputs bee Q = “L”, and Q = “H”. When both of RESET input and SET input are at “H”, outputs bee Q = “H” and Q = “H”. Pin Assignment TC4027BP TC4027BF Block Diagram Weight DIP16-P-300-2.54A SOP16-P-300-1.27A : 1.00 g (typ.) : 0.18 g (typ.) Start of mercial production 1985-02 2014-03-01 Truth Table Inputs RESET SET J - - - - - -...