a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor inter.

The TC518512PL is a 4M bit high speed CMOS pseudo static RAM organized as 524,288 words by 8 bits. The TC518512PL utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed ar}QJow power storage..

TC518512FTL-10LT

TC518512FTL-10

TC518512FTL-10DR

TC518512FTL-70

TC518512FTL-70DR

TC518512FTL-70LT

TC518512FTL-70LV

TC518512FTL-80

TC518512FTL-80DR

TC518512FTL-80LT

TC518512FTL-80LV

TC518512FI-10

TC518512FI-80