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TC55BS4258J - 256K x 4-Bit Synchronous Static RAM

Description

The TC55BS4258J is a 1,048,576 bit synchronous static random access memory fabricated using BiCMOS technology and organized as 262,144 words by 4 bits.

The TC55BS4258J has separate data inputs and outputs and a write-cycle pass-through feature.

Features

  • Fast cycle time - TC55BS4258J-10 10ns (max. ) - TC55BS4258J-12 12ns (max. ).
  • Fast clock access time - TC55BS4258J-10 5ns (max. ) - TC55BS4258J-12 6ns (max. ).
  • Input and output registers for synchronous operation.
  • Data pass-through for write cycles.
  • Single power supply: 5V ± 10%.
  • Separate data inputs and outputs.
  • Package: JEDEC standard pinout - 36-pin, 400mil SOJ: SOJ36-P-400 Pin Names AD - A17 DO - D3 00-03 ClK CE WE OE Voo GND NC Ad.

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Datasheet Details

Part number TC55BS4258J
Manufacturer Toshiba
File Size 178.12 KB
Description 256K x 4-Bit Synchronous Static RAM
Datasheet download datasheet TC55BS4258J Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TOSHIBA 262,144 WORD x 4 BIT SYNCHRONOUS STATIC RAM with Input Registers, Output Registers and Pass-Through Feature 1l:55BS4258]-10/12 PRELIMINARY Description The TC55BS4258J is a 1,048,576 bit synchronous static random access memory fabricated using BiCMOS technology and organized as 262,144 words by 4 bits. The TC55BS4258J has separate data inputs and outputs and a write-cycle pass-through feature. Designed for pipelined architectures, this device has internal input and output registers which latch on the positive edge of an external clock (ClK). All address, data, and control signals are latched. The setup and hold times for the inputs are 2ns and 1ns respectively.
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