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TC55V040AFT - 8-Bit FULL CMOS SRAM

Description

The TC55V040AFT is a 4,194,304-bit static random access memory (SRAM) organized as 524,288 words by 8 bits.

Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to 3.6 V power supply.

Features

  • Low-power dissipation Operating: 10.8 mW/MHz (typical) Single power supply voltage of 2.3 to 3.6 V Power down features using CE1 and CE2 Data retention supply voltage of 1.5 to 3.6 V Direct TTL compatibility for all inputs and outputs Wide operating temperature range of.
  • 40° to 85°C Standby Current (maximum): 3.6 V 3.0 V 7 µA 5 µA.
  • Access Times (maximum): TC55V040AFT -55 Access Time CE1 Access Time CE2 Acces.

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Other Datasheets by Toshiba

Part Number Description
TC55V040AFT (TC55V040ATR/AFT) 8-Bit FULL CMOS SRAM
TC55V040ATR (TC55V040ATR/AFT) 8-Bit FULL CMOS SRAM
TC55V040FT (TC55V040FT/TR) 8-Bit FULL CMOS SRAM
TC55V040TR (TC55V040FT/TR) 8-Bit FULL CMOS SRAM
TC55V020FT (TC55V020FT/TR) 8-Bit FULL CMOS SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TC55V040AFT-55,-70 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 524,288-WORD BY 8-BIT FULL CMOS STATIC RAM DESCRIPTION The TC55V040AFT is a 4,194,304-bit static random access memory (SRAM) organized as 524,288 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to 3.6 V power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3 mA/MHz and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 0.5 µA standby current (at VDD = 3 V, Ta = 25°C, maximum) when chip enable ( CE1 ) is asserted high or (CE2) is asserted low. There are three control inputs.
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