Datasheet Summary
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
512-MBIT (64M × 8 BITS) CMOS NAND E PROM DESCRIPTION
The device is a single 3.3 V 512Mbit (553,648,128) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 4096 blocks. The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes × 32 pages). The device is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as...